NVIDIA Opens Vera Rubin Rack Architecture to the Industry via OCP

NVIDIA is opening up its Vera Rubin rack-scale AI platform. At the Open Compute Project (OCP) Global Summit in San Jose on October 12, 2026, the company announced it is contributing Vera Rubin rack and compute tray designs to the industry through OCP's open MGX architecture, alongside a wave of related standards covering AI factory power, cooling, networking, and open-source management software. The move is meant to give data center builders, hyperscalers, and system vendors a shared, non-proprietary foundation for the next generation of "AI factories" built around NVIDIA's Vera Rubin NVL72 platform.

What NVIDIA announced at OCP Global Summit

NVIDIA's announcement, detailed in an official NVIDIA blog post published at the 2026 OCP Global Summit, centers on opening the architecture behind Vera Rubin NVL72 — NVIDIA's rack-scale platform for large-scale AI training and inference — to the broader OCP ecosystem. Rather than announcing new GPU silicon, this is an infrastructure and standards story: NVIDIA is contributing rack and compute tray designs for Vera Rubin to MGX, the open rack architecture NVIDIA originally introduced through OCP, so that other system builders can design compatible racks, trays, power shelves, and cooling systems around the platform.

Alongside the MGX contribution, NVIDIA and a group of hyperscale partners — including AMD, Google, Meta, Microsoft, and Cisco — used the summit to publish several additional open specifications and software components covering facility design, grid resilience, rack power delivery, and data center networking. Visionbay also used the event to unveil an 800 VDC AI factory platform built on NVIDIA's reference architecture. Collectively, NVIDIA frames this as support for the industry's shift toward gigawatt-scale "AI factories," where racks, power systems, and networking increasingly have to be co-designed rather than sourced piecemeal.

Why opening Vera Rubin's architecture matters

NVIDIA's rack-scale systems have historically shipped as tightly integrated, NVIDIA-designed products. Contributing Vera Rubin's rack and compute tray designs to OCP's open MGX architecture changes that dynamic: it lets qualified system integrators, ODMs, and hyperscalers build their own racks, power shelves, and cooling infrastructure that are compatible with Vera Rubin-class GPU compute, rather than relying solely on NVIDIA's own DGX/NVL72 rack products. This mirrors how NVIDIA previously opened earlier MGX generations, and extends that openness to the mechanical, electrical, and thermal design points needed for the much higher power densities that Vera Rubin-generation hardware requires.

For the data center industry, the practical benefit is supply-chain diversity: multiple vendors building to a common, published specification instead of a single-sourced design. For NVIDIA, it's a way to accelerate how fast "AI factories" at gigawatt scale can be built, by letting more of the ecosystem build qualified infrastructure around its compute platforms.

This also fits a pattern NVIDIA has followed since first bringing MGX to OCP: rather than treating rack-level mechanical and electrical design as proprietary intellectual property, it publishes the reference design and lets partners compete on implementation, qualification speed, and regional manufacturing capacity. The Vera Rubin contribution simply extends that same playbook to a generation of hardware with substantially higher per-rack power and cooling requirements than anything MGX previously covered.

MGX 1.2: the third-generation rack reference design

The centerpiece of the infrastructure news is MGX 1.2, described by NVIDIA as the third-generation MGX reference design, developed through OCP's Open DC Initiative. According to NVIDIA, MGX 1.2 adds several mechanical and electrical upgrades aimed at the higher power and cooling demands of Vera Rubin-class racks:

The 250kW-per-rack ceiling and 5,000A liquid-cooled busbar both point to how much power density has grown since earlier MGX generations, which were designed around far lower rack power budgets. Native 19-inch support is notable because it lets data centers mix MGX-based AI infrastructure with conventional 19-inch rack equipment in the same facility, rather than requiring a fully dedicated footprint.

The Vera CPU rack and agentic AI workloads

Alongside MGX 1.2, NVIDIA introduced a "Vera CPU rack" design that extends the MGX architecture specifically toward agentic AI workloads — the category of AI applications that involves tool calling, multi-step orchestration between models and external systems, and sandboxed code execution, rather than single-pass inference. NVIDIA did not publish detailed mechanical specifications for this rack variant in the October 12 announcement, framing it instead as a design target within the broader MGX 1.2 contribution that system builders can use when architecting CPU-heavy racks to pair with Vera Rubin GPU compute for agentic pipelines.

DSX AI Factory: open-source management software

NVIDIA also expanded its DSX AI Factory software stack with four open-source components, which the company says are informed by its own experience operating DGX Cloud at scale:

• Config Manager — automates switch and network configuration across an AI factory deployment.
• Cluster Readiness Engine — runs stress-testing and validation across GPU clusters before they go into production.
• Rack Management Service — handles rack-level firmware and lifecycle management.
• Cluster API Provider — supports bare-metal provisioning for NVIDIA Infrastructure Controller deployments.

Releasing these as open-source components is consistent with NVIDIA's broader strategy at this summit: rather than keeping the full operational stack proprietary, it's publishing both hardware reference designs (MGX) and software tooling (DSX) so that third parties can stand up compatible AI factories without being locked into NVIDIA's own deployment tooling end-to-end.

Open facility design and grid-resilience standards

Two additional specifications came out of the summit that go beyond any single vendor's hardware:

• Open Data Center Specification v0.7 — jointly published by NVIDIA, AMD, Google, and Meta, this is described as a blueprint for AI factory facility design, covering how a data center building itself should be designed around high-density AI compute.
• OCP Grid Resilience Specification — published separately by Google, Meta, Microsoft, and NVIDIA, this specification addresses how AI infrastructure should respond to grid disturbances, with a goal of restoring systems to near-full load in under two seconds after a disruption.

Both specifications reflect a growing industry concern: as AI training clusters scale into the hundreds of megawatts and beyond, their power draw is large and variable enough to interact meaningfully with the electrical grids they're connected to. A joint, multi-vendor specification for grid resilience — rather than each hyperscaler solving this independently — suggests the industry sees this as a shared infrastructure problem rather than a competitive differentiator.

Visionbay's K-1: an 800 VDC AI factory

Systems integrator Visionbay used the summit to unveil "K-1," an AI factory platform built on NVIDIA's 800 VDC power architecture, combined with power and thermal technology from Vertiv. The pitch for 800 VDC distribution is efficiency and scale: higher-voltage DC power distribution reduces conversion losses and copper requirements compared with traditional AC or lower-voltage DC architectures as rack power climbs into the hundreds of kilowatts. NVIDIA's blog post frames K-1 as an example of the broader ecosystem building complete, deployable AI factory designs on top of NVIDIA's reference architecture rather than NVIDIA building every layer itself.

Networking: Spectrum-6, USFP optics, and Falcon Transport

The summit also brought a cluster of networking announcements tied to scaling AI factories beyond single-rack or single-cluster boundaries:

• Meta adopts Spectrum-6: Meta is adopting NVIDIA's Spectrum-6 Ethernet switches, which NVIDIA says deliver 102.4Tb/s of switching capacity at 200G per lane — twice the switching capacity and per-lane bandwidth of the prior Spectrum-4 generation. As part of this, Meta is building its own "N-IceCube" switch that runs Meta's in-house FBOSS network operating system on top of Spectrum-6 silicon.
• USFP optics with Cisco: NVIDIA and Cisco announced a new pluggable optics form factor called USFP, developed with connector makers TE Connectivity and Amphenol. USFP targets 400Gb/s per lane, scaling from 16 lanes up to 32 lanes, and NVIDIA says it offers roughly 4x the bandwidth density and about 1.3x the power efficiency of existing 200Gb/s-per-lane pluggable optics.
• Falcon Transport with Google: NVIDIA and Google announced that Falcon Transport — Google's transport protocol for reliable data delivery over Ethernet — will come to future NVIDIA ConnectX-10 SuperNICs and BlueField DPUs, implemented through NVIDIA's DOCA software while keeping standard RDMA interfaces for applications.

Taken together, these three networking items point toward AI factories that increasingly span well beyond 100,000 GPUs, where switching capacity, optical interconnect density, and transport-layer reliability all become limiting factors in their own right — not just GPU compute itself. Multiplane networking, in particular, is NVIDIA's answer to a problem that emerges once a single cluster's GPU count climbs into six figures: spreading east-west GPU-to-GPU traffic across up to eight independent network planes, rather than one monolithic fabric, so a single plane's congestion or failure doesn't stall the whole cluster. Pairing that approach with Meta's own FBOSS-based switch hardware signals that at least one hyperscaler is comfortable running NVIDIA's networking silicon under its own software stack rather than NVIDIA's.

What's not confirmed yet

It's worth being precise about what NVIDIA did and did not say on October 12. The company confirmed the MGX 1.2 specification, the Vera CPU rack design concept, the four DSX open-source components, the two open facility/grid specifications, the Spectrum-6/USFP/Falcon Transport networking announcements, and Visionbay's K-1 platform. NVIDIA did not publish specific availability dates, shipping timelines, or pricing for Vera Rubin NVL72 racks built on these open designs, for MGX 1.2-compliant third-party hardware, for USFP optics products, or for Falcon Transport support on ConnectX-10 and BlueField hardware. Anyone citing ship dates or prices for these items is going beyond what NVIDIA has actually published — treat such claims as unconfirmed until NVIDIA, Cisco, Google, or Meta state them directly.

It's also worth distinguishing this announcement from other recent Vera Rubin news. This is specifically about opening the rack-scale architecture to the OCP ecosystem — it's not a product benchmark disclosure, and it's separate from the MLPerf Inference v6.1 benchmark results that covered Vera Rubin performance alongside AMD's MI350P and Intel's Arc Pro B70. It's also a different product line entirely from NVIDIA's consumer-facing RTX Spark agentic AI PC chip, which targets desktop and workstation users rather than rack-scale data center deployments.

What to watch next

With the architecture now open, the next signals worth tracking are which system builders and ODMs announce MGX 1.2-compliant Vera Rubin rack products, whether Visionbay's K-1 or similar 800 VDC designs get concrete deployment timelines, and how quickly Cisco, TE Connectivity, and Amphenol move USFP optics from announced form factor to shipping parts. It's also worth watching how this open rack-scale approach compares with competing data center platforms, including Intel's own data center silicon roadmap, such as Xeon 6 "Clearwater Forest", as hyperscalers weigh open, multi-vendor AI factory designs against more vertically integrated alternatives. NVIDIA has not indicated when it will next update on MGX 1.2 adoption or Vera Rubin rack availability; Pandromeda will follow up as vendors confirm shipping products built on these open designs.

Written byMara Lindqvist

Mara Lindqvist edits the hardware desk. She covers graphics cards, processors, memory and storage, the foundries and chip designers behind them, and what the numbers on a spec sheet mean for people choosing a PC. Specifications in her stories come from manufacturer spec pages and datasheets.

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