AMD EPYC Venice Release Date and Specs Confirmed

AMD's 6th Gen EPYC "Venice" server processors are now generally available. On November 10, 2026, AMD announced that its SP7-platform, Zen 6-based EPYC server CPUs — built on TSMC's 2nm process and topping out at 256 cores in the flagship EPYC 9996 — are shipping now from major server OEMs and ODMs. Meta is AMD's named lead customer validating the platform ahead of large-scale deployment, while Microsoft Azure and Oracle Cloud Infrastructure have each committed to Venice-powered cloud instances that AMD says are "coming soon." AMD also used the announcement to preview a cache-heavy derivative, Venice-X, due in the second half of 2027.

AMD's 6th Gen EPYC Venice is now generally available

AMD said in its November 10 newsroom announcement that 6th Gen AMD EPYC server SP7 processors, code-named "Venice" and built on the new Zen 6 architecture, have reached general availability, with systems now shipping from "all leading server vendors." The GA milestone follows AMD's May 2026 disclosure that Venice had entered production ramp as the first HPC product on TSMC's 2nm-class process, and it lands a few months after AMD first showed Venice silicon publicly at its Advancing AI 2026 event.

The SP7 platform is AMD's mainstream Zen 6 server socket, supporting 16 channels of DDR5 memory (including JEDEC-standard MRDIMMs) and AMD's first PCIe Gen 6 connectivity in a server CPU — the latest step in a server-CPU line that, as EPYC's background shows, AMD has used since 2017 to challenge Intel's share of the data-center market. AMD is positioning the 6th Gen EPYC lineup around three distinct data-center roles: general-purpose enterprise and cloud workloads, GPU "host node" CPUs that feed accelerators like AMD's own Instinct line, and dedicated agent sandbox hosting for agentic AI workloads — a framing that shows up repeatedly in how AMD describes individual SKUs.

EPYC 9996: the 256-core flagship, specs and AMD's own benchmarks

The headline part of the GA lineup is the EPYC 9996, which AMD calls the "world's best general-purpose processor." Per AMD's own published figures:

• Cores: 256 per socket
• Default CPU Power: 600W (AMD's current term for what was previously described as TDP)
• SPECrate2017_int_base (2P, as of 11/05/2026, AMD-reported): 5,470

AMD's own comparison chart, published alongside the GA announcement, pairs that 2P EPYC 9996 score against a 2P EPYC 9965 (3,260), a 2P Intel Xeon 6980P (2,510) and a 2P Intel Xeon 6990E+ (3,050) — all independently benchmarked parts — plus AMD's internal estimates for a 2P Nvidia Vera CPU-based system (1,459) and a 2P Arm "AGI" reference design (1,944). AMD is explicit that the Vera and Arm figures are AMD's own internal projections, not independently measured results, and says they are subject to change.

Framed as ratios, AMD claims a 2P EPYC 9996-based system delivers up to 3.7x the performance of a 2P Nvidia Vera CPU-based system and up to 2.2x the performance (and 2.0x the performance-per-dollar) of a 2P Intel Xeon 6980P-based system, by AMD's own accounting — figures AMD also filed in the investor-relations version of the same release. Those are AMD's marketing comparisons, not figures verified by an independent lab, and AMD has not published full base/boost clock-speed tables for the EPYC 9996 alongside the GA release, so buyers evaluating specific SKUs should check AMD's official product pages for the complete frequency and cache specifications before purchasing.

The "96c HF" high-frequency part: AMD's 5.3GHz headline, and the 5GHz footnote

Alongside the core-count flagship, AMD's 6th Gen EPYC stack includes high-frequency processors aimed at the "GPU host node" role — CPUs that sit next to accelerators and need to move data and run single-threaded orchestration code as fast as possible rather than maximize core count. AMD's GA materials describe these high-frequency parts as reaching up to 5.3GHz in the main text of its announcement.

It's worth reading the fine print here, because AMD's own footnotes are more conservative than the headline number. The specific performance footnote behind AMD's host-node throughput claim describes testing a "96c HF" (96-core, high-frequency) configuration clocked at 5GHz, paired over PCIe Gen 6 with an Nvidia B200 GPU, and compares it against a 5th Gen EPYC 9575F system on PCIe Gen 5. From that comparison, AMD projects up to a 1.8x to 1.9x improvement in LLM CPU-offload throughput — explicitly framed as a projection extrapolated from a measured PCIe Gen 5 baseline, not a fully measured PCIe Gen 6 result. In short: AMD's marketing copy says "up to 5.3GHz," but the test AMD actually cites to support its throughput claim ran the chip at 5GHz. Both numbers come from AMD; neither has been independently verified, and we'd treat the 1.8-1.9x figure as preliminary until third-party testing confirms it.

Meta, Microsoft Azure and Oracle: who's actually using Venice

AMD named three partners in its GA announcement, with three different relationships to the hardware.

Meta is described as a "lead customer" that has been validating 6th Gen EPYC CPU-based platforms ahead of deployment at scale. AMD did not publish a direct Meta quote in the release, and did not specify which Meta workloads or data centers will run Venice first — this is a validation and pre-deployment relationship, not yet a disclosed production rollout.

Microsoft Azure is bringing three Venice-related instance families online, all described by AMD as "coming soon" rather than available today:

• Azure HDv2 — in preview for AI data processing, agentic AI and HPC workloads.
• Azure HXv2 — aimed at EDA (electronic design automation) and other technical-computing workloads.
• Azure ND MI455X v7 — built on AMD's Helios rack-scale platform for production-scale AI inference.

Oracle Cloud Infrastructure will offer OCI Compute E7 instances powered by 6th Gen EPYC, which AMD and Oracle have positioned for enterprise applications and the CPU-side services that surround AI models — things like agent orchestration, retrieval services and in-memory caching layers that sit next to GPU-heavy inference clusters. That follows AMD's broader cloud-infrastructure collaboration with Oracle, detailed separately in AMD's own announcement expanding its AI and cloud partnership with Oracle, which also covers Pensando-based networking for OCI.

None of the three named partners has a Venice-based public cloud instance customers can rent today; AMD's own language — "coming soon" for both cloud providers — makes clear that the GA milestone covers on-premises server shipments first, with hyperscaler cloud availability to follow.

Helion: AMD's new CPU-centric rack platforms

Alongside the CPU silicon, AMD detailed a new family of rack-scale platforms called Helion, distinct from AMD's GPU-centric Helios racks (which pair Instinct MI455X GPUs with Venice CPUs). Helion is built around the CPU's role in agentic AI deployments specifically:

• Helion Liquid — designed to sit alongside Helios rack-scale systems in large agentic AI deployments, aimed at maximizing agent density per rack.
• Helion Air — adds agent capacity within existing air-cooled data centers, without requiring a liquid-cooling retrofit.
• Helion Air Inference — combines CPU execution and local GPU inference within a single air-cooled rack.

AMD says some high-density Helion configurations can reach up to 73,728 threads per rack. In sandbox-style agentic AI deployments — where each CPU thread effectively backs a concurrent AI agent session — AMD claims its high-density EPYC processors deliver roughly 3.3x the agents per CPU watt of a Vera-based system and about 2.5x that of an Intel Xeon 6980P-based system, plus around 1.18x more agents per rack within a 35kW power envelope when run at a reduced power limit versus default settings. As with the SPECrate comparisons above, these agent-density figures are AMD's own estimates — agent counts are a proxy based on available thread resources, not a measurement of any specific real-world agent workload — and have not been independently verified.

What AMD's leadership is saying

Dan McNamara, AMD's senior vice president and general manager of Compute and Enterprise AI, framed the launch around the CPU's expanding role in AI infrastructure: "AI is significantly expanding the role of the CPU across every layer of the data center," McNamara said in AMD's announcement, adding that the broader 6th Gen EPYC portfolio lets customers "standardize on the proven x86 foundation while choosing a workload-optimized solution" for general-purpose computing, GPU host nodes or agent sandboxes.

What's next: Venice-X and the Verano generation

AMD is not done with the Zen 6 server family. At its Advancing AI 2026 event, AMD previewed Venice-X, a cache-heavy derivative aimed squarely at HPC and other technical-compute workloads rather than general-purpose throughput. As previewed, Venice-X pairs 96 Zen 6 cores with a large 1,152MB of stacked 3D V-Cache and boost clocks up to roughly 5.15GHz — trading core count for cache capacity in the same way AMD's earlier Genoa-X and Milan-X parts did for prior EPYC generations. AMD has pointed to a second-half-2027 launch window for Venice-X; as with any pre-launch preview, final specifications, model numbers and pricing are subject to change before AMD's formal product announcement.

Beyond Venice-X, AMD has already disclosed a further EPYC generation code-named Verano as part of its longer-range data-center roadmap, which AMD has said will pair with its next-generation Helios 500 rack-scale platform and Instinct MI500-series GPUs — both slated for 2027 — as detailed in AMD's Advancing AI 2026 roadmap announcement. AMD has not yet published detailed Verano core counts, cache configurations or performance targets.

Venice's GA also arrives against a competitive backdrop that Pandromeda has covered separately: see our look at what's actually confirmed in the Intel Diamond Rapids vs. AMD EPYC Venice comparison for how AMD's new flagship stacks up against Intel's next-generation server silicon on paper. EPYC silicon is also already live in production cloud deployments elsewhere — Google Cloud, for instance, pairs EPYC CPUs with its own accelerators, as we detailed in our report on AMD EPYC powering Google Cloud's confidential TPU instances.

Why this launch matters

Venice's general availability is as much about AMD's data-center roadmap discipline as it is about any single benchmark. AMD has now shipped a 2nm-class server CPU on schedule, lined up two major hyperscalers (plus a very large private deployer in Meta) as named partners months ahead of their own instance availability, and used the same announcement to lay out a cache-optimized HPC variant and a further generation on the roadmap. The near-term test is simple: whether Azure's and Oracle's "coming soon" Venice instances actually show up on a predictable timeline, and whether AMD's SPECrate and agent-density claims hold up once independent benchmarking firms get their own EPYC 9996 systems in hand.

Frequently asked questions

When did AMD's 6th Gen EPYC "Venice" processors become generally available?

AMD announced general availability on November 10, 2026. The SP7-platform, Zen 6-based processors are shipping now from major server OEMs and ODMs.

What is the AMD EPYC 9996?

It's the flagship 6th Gen EPYC part: 256 cores per socket, 600W Default CPU Power, and AMD's self-described "world's best general-purpose processor," with an AMD-reported 2P SPECrate2017_int_base score of 5,470.

Which cloud providers will offer EPYC Venice-based instances?

Microsoft Azure (HDv2, HXv2 and ND MI455X v7) and Oracle Cloud Infrastructure (OCI Compute E7) have both committed to Venice-based instances, which AMD describes as "coming soon" rather than available today.

Is Meta already running EPYC Venice in production?

Meta is AMD's named lead customer and has been validating 6th Gen EPYC platforms ahead of deployment at scale; AMD has not disclosed a production rollout timeline.

What is Venice-X, and when will it launch?

Venice-X is a cache-heavy derivative AMD previewed alongside the Venice GA news: 96 Zen 6 cores, 1,152MB of 3D V-Cache and boost clocks up to roughly 5.15GHz, aimed at HPC and technical-compute workloads. AMD has pointed to a second-half-2027 launch window.

What are AMD's new Helion rack platforms?

Helion Liquid, Helion Air and Helion Air Inference are new CPU-centric rack platforms AMD detailed alongside the Venice launch, designed to maximize agentic AI "agent density" in liquid-cooled, air-cooled and hybrid CPU/GPU-inference configurations, respectively.

Written byMara Lindqvist

Mara Lindqvist edits the hardware desk. She covers graphics cards, processors, memory and storage, the foundries and chip designers behind them, and what the numbers on a spec sheet mean for people choosing a PC. Specifications in her stories come from manufacturer spec pages and datasheets.

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